1. Technical Field
Various embodiments generally relate to a refresh control device, and more particularly, to a technology capable of reducing a timing margin error in a semiconductor device that performs a refresh for a bank.
2. Related Art
Recently, in mobile electronic products including smart phones, there are demands for a large capacity DRAM. In general, in a semiconductor memory device such as a DRAM, data stored in a memory cell may be changed by a leakage current. Therefore, in order to periodically recharge the data stored in the memory cell, a refresh operation is required.
That is, a memory cell of a dynamic semiconductor memory such as a DRAM stores data on a capacitive element. Due to charge leakage from the capacitive element, the memory cell should be periodically refreshed. Typically, the refresh process consists of a step of performing a read operation in order to take a level of charge stored in a memory cell as is.
Particularly, a semiconductor memory device such as a DDR SDRAM (Double Data Rate Synchronous DRAM) consists of a plurality of memory banks for storing data, wherein each of the plurality of memory banks consists of tens of millions or more of memory cells. Each of the memory cells consists of a cell capacitor and a cell transistor and the semiconductor memory device stores data through an operation for charging charge in the cell capacitor or discharging the charge.
The amount of the charge stored in the cell capacitor should be ideally constant at all times if there is no separate control. However, actually, due to a voltage difference with a peripheral circuit, the amount of the charge stored in the cell capacitor changes.
That is, in the state in which the cell capacitor has been charged, charge may be discharged or in the state in which the cell capacitor has been discharged, charge may be introduced. As described above, a change in the charge amount of the cell capacitor indicates a change in data stored in the cell capacitor, that is, indicates loss of the stored data. In order to substantially prevent data from being lost as described above, the semiconductor memory device performs a refresh operation.
With the passage of time, different types of refresh methods have been developed. In a normal auto-refresh method, a refresh timer exists outside a memory chip and the memory chip performs a refresh operation in response to a periodic refresh command supplied by a controller.
Furthermore, in a self-fresh method, a refresh timer exists inside a memory chip and all memory chips require a refresh start command from a controller.